This board was originally designed for this board. The interface connector on the PCB attaches directly to Pete Dunster's F1 development board. It features a GAL decoder to allow flexible address decoding.
In GAL AEN is tied low, IOR and IOW are derived by decoding R/W and CS1 from the HC11F1. The reset is inverted as the CS8900 has an active high reset, the hc11 is active low. Other than CS1, no further address decoding is performed - the registers decode into the HC11F1's memory from 0x60 - 0x6f, again at 0x70 - 0x7f and so on through the CS1 address space. Revision 2 of the PCB offers more address lines to the GAL and the ability to further qualify this space although no GAL data is provided for this. Revision 2 also provides for access to CS2 for alternate addressing.
Revision 1 of the board included a LS245 bus buffer as there was more logic planned for the board. This complicated the bus timing and proved unnecessary - you can see in the photos that it has been bridged out. In Revision 2 of the board, it is still included, but bridged out on the PCB. The buffer was controlled from the GAL, its control signals are still in place.
The design is targeted to an HC11F1 which has on-board chip select signals to provide memory decoding. In an alternate processor the chip select, A0-3 and D0-D7 could be substituted for but using port pins (as per the 8051 designs). The software is quite large and requires a considerable amount of RAM. It is not expected that the design would suit single chip mode, although using an OTP part (w/12k of ROM) and limiting to packets of 256 bytes (no BOOTP) this might be possible.
The Schematic can be found here. The board interfaces to the hc11f1 board expansion connector. Further information can be found in the cs8900 application note AN181
PCB for sale here
Missing ground to GAL (see here)
Slight pitch error in QPFP (see here) This may just be bad soldering on my part.
Fixed broken track
Checked for holes in SMD pads (where did they come from?)
Added 0.1u cap to bottom for crystal oscillator
Fixed grounding of 0.1u caps on bottom
Brought CS2 and A4-6 out to GAL for flexible decoding
Fixed IRQ from CS8900 (currently unused)
Bridged out LS245 to allow tracks to be cut where needed
Need to fix pitch error in CS8900 pins
Enlarged pads on 10uF caps to take cheaper electrolytics as well as tantalums
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